CPU Project Status | |||
Project File: | cpu.ise | Current State: | Placed and Routed |
Module Name: | cpu |
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No Errors |
Target Device: | xc3s1500-5fg320 |
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9 Warnings |
Product Version: | ISE 8.2.02i |
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? 11 11 14:12:09 2006 |
CPU Partition Summary | |||
No partition information was found. |
Device Utilization Summary | ||||
Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slice Flip Flops | 113 | 26,624 | 1% | |
Number of 4 input LUTs | 647 | 26,624 | 2% | |
Logic Distribution | ||||
Number of occupied Slices | 372 | 13,312 | 2% | |
Number of Slices containing only related logic | 372 | 372 | 100% | |
Number of Slices containing unrelated logic | 0 | 372 | 0% | |
Total Number 4 input LUTs | 664 | 26,624 | 2% | |
Number used as logic | 647 | |||
Number used as a route-thru | 17 | |||
Number of bonded IOBs | 91 | 221 | 41% | |
IOB Flip Flops | 1 | |||
Number of Block RAMs | 5 | 32 | 15% | |
Number of MULT18X18s | 1 | 32 | 3% | |
Number of GCLKs | 1 | 8 | 12% | |
Total equivalent gate count for design | 337,212 | |||
Additional JTAG gate count for IOBs | 4,368 |
Performance Summary | |||
Final Timing Score: | 0 | Pinout Data: | Pinout Report |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report |
Timing Constraints: | All Constraints Met |
Detailed Reports | |||||
Report Name | Status | Generated | Errors | Warnings | Infos |
Synthesis Report | Current | ? 11 11 14:09:18 2006 | 0 | 9 Warnings | 1 Info |
Translation Report | Current | ? 11 11 14:09:36 2006 | 0 | 0 | 0 |
Map Report | Current | ? 11 11 14:09:57 2006 | 0 | 0 | 3 Infos |
Place and Route Report | Current | ? 11 11 14:11:22 2006 | 0 | 0 | 2 Infos |
Static Timing Report | Current | ? 11 11 14:11:34 2006 | 0 | 0 | 2 Infos |
Bitgen Report |
Secondary Reports | ||
Report Name | Status | Generated |
Xplorer Report |